Reducing power in SRAMs while maintaining cell stability

Reducing power in SRAMs while maintaining cell stability

An SRAM with reduced power consumption comprising N SRAM cells and peripheral circuitry that enables writing and reading any of the N SRAM cells. The number of cells, N, is a whole number. The voltage applied to the N SRAM cells is higher than the voltage applied to the peripheral circuitry.

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Bibliographische Detailangaben
Hauptverfasser: WUU JOHN, MORGANTI CHARLES R, WEISS DONALD R, LACHMAN JONATHAN E
Format: Patent
Sprache:eng
Schlagworte:
INFORMATION STORAGE
PHYSICS
STATIC STORES
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Beschreibung
Zusammenfassung:An SRAM with reduced power consumption comprising N SRAM cells and peripheral circuitry that enables writing and reading any of the N SRAM cells. The number of cells, N, is a whole number. The voltage applied to the N SRAM cells is higher than the voltage applied to the peripheral circuitry.