Method for designing semiconductor intgrated circuit and system for designing the same
A total random number sequence generator generates a total random number sequence of an entire circuit, as fabrication variation. A signal path random number sequence extracting section extracts, from the total random number sequence, a signal path random number sequence for a partial circuit obtain...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A total random number sequence generator generates a total random number sequence of an entire circuit, as fabrication variation. A signal path random number sequence extracting section extracts, from the total random number sequence, a signal path random number sequence for a partial circuit obtained by dividing the entire circuit. A circuit simulating section executes Monte Carlo analysis using the signal path random number sequence for each partial circuit, thereby obtaining a desired circuit characteristic distribution. In this manner, correlation is maintained between divided circuit characteristic distributions and, in addition, the obtained circuit characteristic distribution is used for clock skew distribution calculation and others. Moreover, the circuit scale of a target of circuit simulation is reduced. |
---|