Adaptive fetch gating in multithreaded processors, fetch control and method of controlling fetches

A multithreaded processor, fetch control for a multithreaded processor and a method of fetching in the multithreaded processor. Processor event and use (EU) signs are monitored for downstream pipeline conditions indicating pipeline execution thread states. Instruction cache fetches are skipped for a...

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Hauptverfasser: EICKEMEYER RICHARD J, EMMA PHILIP G, GRISWELL JOHN B, LOGAN DOUGLAS R, BOSE PRADIP, LE HUNG Q, SINHAROY BALARAM, EISEN LEE E, HU ZHIGANG, BUYUKTOSUNOGLU ALPER
Format: Patent
Sprache:eng
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Zusammenfassung:A multithreaded processor, fetch control for a multithreaded processor and a method of fetching in the multithreaded processor. Processor event and use (EU) signs are monitored for downstream pipeline conditions indicating pipeline execution thread states. Instruction cache fetches are skipped for any thread that is incapable of receiving fetched cache contents, e.g., because the thread is full or stalled. Also, consecutive fetches may be selected for the same thread, e.g., on a branch mis-predict. Thus, the processor avoids wasting power on unnecessary or place keeper fetches.