Clock generating apparatus
A clock generating apparatus includes a first PLL circuit configured to generate a sync clock in phase with reference time information from a data stream, an oscillator configured to generate a fixed clock, a control unit configured to output a clock switching signal, and a clock switching unit conf...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A clock generating apparatus includes a first PLL circuit configured to generate a sync clock in phase with reference time information from a data stream, an oscillator configured to generate a fixed clock, a control unit configured to output a clock switching signal, and a clock switching unit configured to selectively switch the sync clock and the fixed clock to each other in accordance with the clock switching signal and output the selected clock as a system clock. |
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