High-speed transmission apparatus

A high-speed transceiver apparatus is connected between a USB controller of a host and a peripheral device. The transceiver apparatus has a dual-port memory with a first data port and a second data port, a DMA unit providing a data transmission between the second data port and the peripheral device, and a processor controlling the data access of the dual-port memory for the peripheral device. When the USB controller of the host accesses the dual-port memory through the first data port, the processor commands the peripheral device to access the dual-port memory through the second data port. The DMA unit controls the data transmission between the dual-port memory and the peripheral device.