Semiconductor device including a hybrid metallization layer stack for enhanced mechanical strength during and after packaging

Semiconductor device including a hybrid metallization layer stack for enhanced mechanical strength during and after packaging

The introduction of dielectric material of enhanced mechanical stability, such as silicon dioxide or fluorine-doped silicon dioxide, into the via level of a low-k interconnect structure provides an increased overall mechanical stability, especially during the packaging of the device. Consequently, c...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: WERKING JAMES, HUEBLER PETER, ZISTL CHRISTIAN, FEUSTEL FRANK
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:The introduction of dielectric material of enhanced mechanical stability, such as silicon dioxide or fluorine-doped silicon dioxide, into the via level of a low-k interconnect structure provides an increased overall mechanical stability, especially during the packaging of the device. Consequently, cracking and delamination, as frequently observed in high end low-k interconnect structures, may significantly be reduced, even if organic package substrates are used.