Debug system

A debug process which reduces the time delay caused by the backward replacement of a software break point is disclosed. A host computer issues a command to the ICE. When this command requests program execution from a software break point, the, ICE reads the inherent instruction having existed in the...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SHIN TAKAO, TSUBOI KENTA, HISADOME YUKIO, SHIMADA GO
Format: Patent
Sprache:eng
Schlagworte:
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Beschreibung
Zusammenfassung:A debug process which reduces the time delay caused by the backward replacement of a software break point is disclosed. A host computer issues a command to the ICE. When this command requests program execution from a software break point, the, ICE reads the inherent instruction having existed in the object execution start location from the inherent instruction group stored in the host computer. The inherent instruction is sent to the re-execution start instruction setting register. The CPU core reads the instruction from the register. After the end of this read, the instruction bus switching circuit is switched to the memory. The CPU then sequentially reads the instruction from the memory and then executes this instruction.