Method for the production of a memory cell, memory cell and memory cell arrangement

Memory cell having an auxiliary substrate, on which a first gate insulating layer is formed, a floating gate formed on the first gate insulating layer, an electrically insulating layer formed on the floating gate, a memory gate electrode formed on the electrically insulating layer, a substrate fixed to the memory gate electrode, a second gate insulating layer formed on a part of a surface of the auxiliary substrate, which surface is uncovered by partially removing the auxiliary substrate, a read gate electrode formed on the second gate insulating layer, and two source/drain regions located between a channel region essentially in and/or on a surface region of the remaining material of the auxiliary substrate that is free of the second gate insulating layer and the read gate electrode, the channel region being arranged in each case at least partly laterally overlapping the floating gate and the read gate electrode.