Generation of software objects from a hardware description

System and methods for generating a software object that simulates the operation of a hardware device from a register transfer level description of the device written in a hardware description language, such as Verilog. The invention uses global analysis techniques (i.e., analysis of the design of the electronic device as a whole) to produce cycle accurate simulations of hardware devices. These global analysis techniques include generation of a static schedule for the simulation, based on clock edges and other selected signals present in the design. In some embodiments, reusing results from a previous simulation optimizes the simulation. In some embodiments, the software object that is generated may be linked with software that is being developed or tested for use with the hardware that is simulated by the software object. The software that is being developed or tested may interact with the simulation using a high-throughput application program interface (API).