MULTI-CLOCK DOMAIN LOGIC SYSTEM AND RELATED METHOD
A multi-clock domain logic system includes a plurality of clock domains corresponding respectively to a plurality of clock signals and comprises at least one flip-flop group per each. When a scanning test is executed, a scanning test clock signal is asynchronously input into the flip-flop groups in...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A multi-clock domain logic system includes a plurality of clock domains corresponding respectively to a plurality of clock signals and comprises at least one flip-flop group per each. When a scanning test is executed, a scanning test clock signal is asynchronously input into the flip-flop groups in a predetermined sequence to form a clock signal of the flip-flop groups. |
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