Microprogrammable SDRAM memory interface controller

An SDRAM controller includes a service unit for receiving an SDRAM service request from at least one requester; a memory for storing instructions for performing a plurality of SDRAM transactions; and a lookup table of a sequence of addresses corresponding to at least a portion of the instructions stored in the memory, the portion of the instructions defining the SDRAM transaction. The service unit is configured to execute the SDRAM transaction based on the sequence of addresses in the lookup table. Also included is an arbiter for receiving service requests from multiple requestors to access the SDRAM, and another lookup table of identifiers corresponding to the multiple requestors, the identifiers stored in another sequence of addresses. The arbiter is configured to sequentially access each address in the other sequence of addresses, and grant service to a requestor based on an identifier stored in an address accessed.