STACK-TYPE MULTI-CHIP PACKAGE AND METHOD OF FABRICATING BUMPS ON THE BACKSIDE OF A CHIP

A stack-type multi-chip package at least comprising a substrate, a first chip, a second chip, a plurality of bump pads, a plurality of bumps, a plurality of first conductive wires, a plurality of second conductive wires and some packaging material. The backside of the first chip is attached to the substrate. The second chip is assembled to the active surface of the first chip. The bump pads are positioned on the backside of the second chip. The bumps are sandwiched between the first chip and the second chip such that the bumps are bonded to the first chip and the bump pads. The first chip and the second chip are electrically connected to the substrate through the first conductive wires and the second conductive wires. The packaging material encapsulates the first chip, the second chip, the bumps, the first conductive wires and the second conductive wires.