Method for handling data between a clock and data recovery circuit and a data processing unit of a telecommunications network node of an asynchronous network, as well as a bit rate adaptation circuit and a clock and data recovery system

A method for handling data between a clock and data recovery system CDR and a data processing unit DP of a telecommunications network node TNN of an asynchronous communications network, using a bit rate adaptation circuit BAS, the bit rate adaptation system BAS comprising a memory unit MEM with a wr...

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Bibliographische Detailangaben
Hauptverfasser: WOLDE JURGEN, SUND MATTHIAS, KARSTADT JORG
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A method for handling data between a clock and data recovery system CDR and a data processing unit DP of a telecommunications network node TNN of an asynchronous communications network, using a bit rate adaptation circuit BAS, the bit rate adaptation system BAS comprising a memory unit MEM with a write process circuit Wp controlled by the recovered clock Rclk and a read process circuit Rp controlled by the local clock Lclk wherein the bit rate adaptation system BAS also comprises a pointer synchronization controller PSC which, depending on the data detected on the input data signal DIb1 of the bit rate adaptation system BAS, sets the read and write pointers to a fixed initial address value. A Clock and Data Recovery system and a telecommunications network node TNN of an asynchronous network, which comprise a bit adaptation circuit BAS according to the invention, are also disclosed.