Nitride-encapsulated FET (NNCFET)

A double-gate field effect transistor (DGFET) structure and method of forming such a structure in which the parasitic capacitance under the source/drain regions is substantially reduced are provided. In the present invention, self-aligned isolation regions are provided to reduce the parasitic capaci...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: CHAN KEVIN K, HANAFI HUSSEIN I, SOLOMON PAUL M
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A double-gate field effect transistor (DGFET) structure and method of forming such a structure in which the parasitic capacitance under the source/drain regions is substantially reduced are provided. In the present invention, self-aligned isolation regions are provided to reduce the parasitic capacitance in the DGFET structure. Additionally, the present invention encapsulates the silicon-containing channel layer to enable the back-gate to be oxidized to a greater extent thereby reducing the parasitic capacitance of the structure even further.