DMA controller and DMA transfer method

A DMA channel data quantity setting section sets a data transfer quantity of each of a plurality of DMA channels in accordance with a data quantity or a ratio in advance. A channel select control circuit determines whether each DMA channel is active. A data transfer control circuit transfers the data of the DMA channel determined to be active by the channel select control circuit in accordance with the data transfer quantity of each DMA channel set by the DMA channel data quantity setting section. By doing so, a plurality of DMA requests are accepted per bus hold request, and the number of bus management right arbitration procedures and the latency between the channels are decreased.