Semiconductor chip mounting wafer
A plurality of semiconductor chips such as a dynamic random access memory are formed on a wafer. The semiconductor chips are partitioned by a dicing line region. A silicon oxide film is formed on the wafer. A corrugated groove is formed on an insulating film located in the dicing line region. A meta...
Gespeichert in:
| Hauptverfasser: | , |
|---|---|
| Format: | Patent |
| Sprache: | eng |
| Schlagworte: | |
| Online-Zugang: | Volltext bestellen |
| Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
| Zusammenfassung: | A plurality of semiconductor chips such as a dynamic random access memory are formed on a wafer. The semiconductor chips are partitioned by a dicing line region. A silicon oxide film is formed on the wafer. A corrugated groove is formed on an insulating film located in the dicing line region. A metal film such as barrier metal constituting the semiconductor chips is formed so as to cover a surface of the corrugated groove. A film stress of the metal film is dispersed in multiple directions. It is thereby possible to obtain a semiconductor chip mounting wafer capable of ensuring relaxing wafer warping and suppressing an electrostatic chuck error. |
|---|