Integrated circuit package and method for fabrication

An integrated circuit package includes at least one semiconductor die embedded in a substrate made of a heat deformable material such as plastic or a combination of plastics. The at least one die is embedded so that the top surface of the at least one die, which contains a plurality of bonding pads, is exposed, and, in certain embodiments, substantially coplanar with the top surface of the substrate. A layer of conductive material is then formed on the top surface of the substrate and on the top surfaces(s) of at least one semiconductor die. This layer is formed into a plurality of electrically conductive paths each path beginning at a selected bonding pad and terminating in an electrically conductive land on the top surface of the substrate. Electrical connection is then made between the at least one die and external circuitry by placing the structure on a printed circuit board, for example, with electrically conductive balls between the electrically conductive lands on the substrate and adjacent electrical contacts on the printed circuit board. If desired, a protective coating can be formed over the at least one semiconductor die or over the combination of the at least one semiconductor die and the substrate to protect the surface of the at least one semiconductor die.