Sense interface system with velocity feed-through rejection

A capacitive sensing circuit coupled to a variable capacitor. The circuit comprises a sense pulse generator providing a first polarity sense pulse and a second polarity sense pulse; a sense capacitor coupled to the sense pulse generator; a charge detector coupled to the sense capacitor; and a storag...

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Bibliographische Detailangaben
Hauptverfasser: SHERMAN STEVEN J, JONES JASON C, JUNEAU THOR N, CLARK WILLIAM A, LEMKIN MARK A
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A capacitive sensing circuit coupled to a variable capacitor. The circuit comprises a sense pulse generator providing a first polarity sense pulse and a second polarity sense pulse; a sense capacitor coupled to the sense pulse generator; a charge detector coupled to the sense capacitor; and a storage device coupled to the charge detector. The storage device may be a sample and hold circuit, a capacitor or a buffer. Multiple capacitors may be provided to enable a position detection scheme which is suitable for use in an optical mirror switching array. An analog to digital converter may be coupled to the storage device and a digital demodulator device coupled to the output of the analog to digital converter.