Structure and method for wiring translation between grids with non-integral pitch ratios in chip carrier modules

Structure and method for wiring translation between grids with non-integral pitch ratios in chip carrier modules

A jogging structure for translating wiring connections from points in a first grid to corresponding points in a second grid in a chip carrier module is disclosed. In an exemplary embodiment, the structure includes a first translation layer, coupled to the first grid, the first translation layer tran...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: SIGLER ANTHONY WAYNE, DAVES GLENN G, SHUTLER WILLIAM F, ZADANY CATHY ANN, VETRERO JOHN, FRANKEL JASON, STOLLER HERBERT I
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
PRINTED CIRCUITS
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:A jogging structure for translating wiring connections from points in a first grid to corresponding points in a second grid in a chip carrier module is disclosed. In an exemplary embodiment, the structure includes a first translation layer, coupled to the first grid, the first translation layer translating the first grid in an x-axis direction. A second translation layer is coupled to the first translation layer, the second translation layer for translating said wiring connections from the first grid in a y-axis direction, the y-axis direction being orthogonal to the x-axis direction. The second translation layer is further coupled to the second grid.