System and method for testing circuits and programming integrated circuit devices

An improved system and method for increasing system throughput and data capacity in a circuit tester capable of programming and/or testing in-circuit integrated circuit devices are disclosed. A data accelerator for use in a test vector sequencer can be realized with a data translator, a plurality of sequence memory devices, and a switch. In preferred embodiments, the data translator and the switch are configured via a single control signal responsive to an indication that a first sequence memory device is prepared to receive a data segment and that a second sequence memory device is prepared to transfer a previously stored data segment. A method for increasing throughput in a circuit tester can be realized as follows: segmenting a test application; acquiring a first application segment in a first storage device; configuring a test sequencer to forward the first application segment and to simultaneously acquire a subsequent application segment in a second sequence memory device; detecting a condition responsive to the completion of the segment acquisition and forwarding tasks; reconfiguring the test sequencer to switch the roles of the first and second sequence memory devices; and repeating the configuring and detecting steps until all application segments have been processed.