AC defect detection and failure avoidance power up and diagnostic system

A system for modifying the power up and diagnostic procedure of systems such that the system voltage is lowered to a predetermined voltage level that has been shown to detect delay faults. The system conducts the normal procedure of power up/diagnostic routines at the described VLV condition and the...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: VAN HORN JODY J, NIGH PHILLIP J
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A system for modifying the power up and diagnostic procedure of systems such that the system voltage is lowered to a predetermined voltage level that has been shown to detect delay faults. The system conducts the normal procedure of power up/diagnostic routines at the described VLV condition and then logs failures to this VLV condition. Upon completion of the VLV power up, the system is shut down normally and then subsequently powered up again at the normal voltage conditions. Discrepancies between the VLV power up/diagnostics are noted in the system log and communicated appropriately.