Method and apparatus for arbitrating a memory bus
A method and apparatus comprising initializing a circuit, said circuit having at least one memory element coupled to a memory bus, on a host system (e.g., a computer system). Monitoring signals on the memory bus of the host system, detecting a first sequence of signals, and switching control of the...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | A method and apparatus comprising initializing a circuit, said circuit having at least one memory element coupled to a memory bus, on a host system (e.g., a computer system). Monitoring signals on the memory bus of the host system, detecting a first sequence of signals, and switching control of the at least one memory element to the circuit coupled to the memory bus on the host system. The method and apparatus further comprises detecting a second sequence of signals, and switching control of the at least one memory element to the host system. |
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