SDRAM interface control system and method
Systems and methods of controlling the timing of a clock signal used to latch information from one or more memory modules, such as SDRAM modules. The invention relates to generating a latch or read clock signal that relates to the actual SDRAM control clock signal. The generated clock signal account...
Gespeichert in:
Hauptverfasser: | , |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Schreiben Sie den ersten Kommentar!