SDRAM interface control system and method

Systems and methods of controlling the timing of a clock signal used to latch information from one or more memory modules, such as SDRAM modules. The invention relates to generating a latch or read clock signal that relates to the actual SDRAM control clock signal. The generated clock signal account...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: BLAKE RODNEY DANIEL, KRAMER ALLEN NICHOLAS
Format: Patent
Sprache:eng
Schlagworte:
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