Algorithmically programmable memory tester with breakpoint trigger, error jamming and 'scope mode that memorizes target sequences

A trigger signal for a memory tester having algorithmic test programs detects the occurrence of a trigger specification expressed in terms of existing hardware quantities used to operate the DUT. This forms a raw hardware (breakpoint) trigger that can be further qualified according to what part of the test program is being executed. The qualified breakpoint trigger can be delayed by zero or more DUT cycles before becoming a system trigger signal that can be used to trigger a "scope mode and to force an error flag to a selected value so as to compel a particular path with the test program. A user interacts with a process not part of the test program to define a trigger specification from masks and comparison mechanisms that recognize the raw trigger condition at the level of the hardware register values. That process also informs the compiler as to which portions of the test program are to enable the raw trigger specification (done by setting a bit in the instruction word). To provide stable waveforms for the sweeping of the voltage thresholds and sample timing offset the memory tester records the addresses for a target sequence of transmit vectors issued during an initial pass through the test program subsequent to the occurrence of the trigger. These addresses are exchanged for the instructions themselves, which are then altered to remove branching, and stored in a reserved portion of the memory they came from. Once the altered target sequence is stored the desired information is produced by restarting the entire test program and letting it run exactly as before down to the trigger. Now when the trigger occurs further transmit vectors are issued from the memorized target sequence, rather than from the live algorithm, and a combination of voltage thresholds and the sample timing offset are switched into place. That combination constitutes one step along an acquisition sweep of their values. The receive vectors for the target sequence are stored as they arrive. After the target sequence the test program is re-started with normal thresholds and sample timing offsets. There is eventually another trigger, whereupon the memorized target sequence is again substituted while the next combination in the step along the acquisition sweep is instituted. This process is continued until the entire acquisition sweep has been performed. An inspection of the stored data allows creation of the waveforms.