Sampling digitizer, method for sampling digitizing, and semiconductor intergrated circuit test device with sampling digitizer

A sampling digitizer comprises a sampling head 11, a clock generator 12, a digitizer 13 and a trigger circuit 14. A clock signal from the clock generator is also supplied to a delay element 15, and a change-over switch 16 switches from an output from the delay element 15 to a clock signal which does...

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1. Verfasser: SUGAI MASAO
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A sampling digitizer comprises a sampling head 11, a clock generator 12, a digitizer 13 and a trigger circuit 14. A clock signal from the clock generator is also supplied to a delay element 15, and a change-over switch 16 switches from an output from the delay element 15 to a clock signal which does not pass through the delay element 15 to feed the sampling head 11 in response to a trigger signal from the trigger circuit.