Transistor circuit

MOS transistors A and B form a transistor circuit (an inverter in this case). A MOS transistor D is one for interrupting leakage current that has a channel length longer than those of the MOS transistors A and B. Under the action of an enable terminal (Enable), the MOS transistor D conducts only whi...

Ausführliche Beschreibung

Gespeichert in:
Bibliographische Detailangaben
1. Verfasser: SHIMIZUME KAZUTOSHI
Format: Patent
Sprache:eng
Schlagworte:
Online-Zugang:Volltext bestellen
Tags: Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
Beschreibung
Zusammenfassung:MOS transistors A and B form a transistor circuit (an inverter in this case). A MOS transistor D is one for interrupting leakage current that has a channel length longer than those of the MOS transistors A and B. Under the action of an enable terminal (Enable), the MOS transistor D conducts only while the circuit is operated, and does not conduct and thereby interrupts leakage current while the circuit is in a standby state. A MOS transistor C does not produce effect while the circuit is operated, and makes the potential of an output terminal (Output) a high potential or a low potential (not intermediate potential) only while the circuit is in the standby state. Therefore, the circuit controls unnecessary through-transistor current of a standby type circuit in a succeeding stage, which current is conventionally caused at an intermediate potential during standby.