Dynamic processor architecture control

A processor comprising a control unit and a plurality of processing units interacting according to an operating architecture imposed dynamically by the control unit from among at least two of the following architectures: a single instruction multiple data (SIMD) stream architecture, a multiple instruction single data (MISD) stream architecture, and a multiple instruction multiple data (MIMD) stream architecture. The operating architecture is imposed dynamically by the control unit according to: configuration functions included in a machine code, and/or data to be processed and current processing instructions received as input of the processor.