Multi-channel system architecture for managing flow of data and associated trace information

Multi-channel system architecture for managing flow of data and associated trace information

A system-on-chip (SoC) in which trace data is managed includes a first memory device, a first interface to couple the first memory to a second memory external to the system-on-chip, and a first processing resource coupled to the first interface and the first memory device. The first processing resou...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Mody, Mihir Narendra, Narayanan, Santhanakrishnan Narayanan, Yeyyadi Anantha, Prithvi Shankar, Chitnis, Kedar Satish, Ankur, Ankur, Nandan, Niraj, Jadav, Brijesh, Jagannathan, Shyam, Dhande, Vivek Vilas
Format: Patent
Sprache:eng
Schlagworte:
CALCULATING
COMPUTING
COUNTING
ELECTRIC DIGITAL DATA PROCESSING
PHYSICS
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Beschreibung
Zusammenfassung:A system-on-chip (SoC) in which trace data is managed includes a first memory device, a first interface to couple the first memory to a second memory external to the system-on-chip, and a first processing resource coupled to the first interface and the first memory device. The first processing resource includes a data buffer and a first direct access memory (DMA) controller. The first DMA controller transmits data from the data buffer to the first interface over a first channel, and transmits the data from the data buffer with associated trace information for the data to the first memory device over a second channel.