Semiconductor structure and method of forming the same, memory and method of forming the same

The present invention relates to a semiconductor structure and its forming method, and a memory and its forming method. The semiconductor structure includes a substrate, a vertical transistor on the substrate, and a bit line connected to the bottom of the vertical transistor and disposed between the...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Ping, Er-Xuan, Zhu, Yiming
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:The present invention relates to a semiconductor structure and its forming method, and a memory and its forming method. The semiconductor structure includes a substrate, a vertical transistor on the substrate, and a bit line connected to the bottom of the vertical transistor and disposed between the bottom of the vertical transistor and the substrate. The vertical transistor in such a semiconductor structure has a relatively small plane dimension.