Branch target buffer with shared target bits

Embodiments of the present disclosure include techniques for branch prediction. A branch predictor may be included in a front end of a processor. The branch predictor may store branch targets in a branch target buffer. The branch target buffer includes shared bits, which may be combined with branch...

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Bibliographische Detailangaben
Hauptverfasser: Arunachalam, Somasundaram, Streett, Daren Eugene, Doing, Richard William
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Embodiments of the present disclosure include techniques for branch prediction. A branch predictor may be included in a front end of a processor. The branch predictor may store branch targets in a branch target buffer. The branch target buffer includes shared bits, which may be combined with branch target bits to specify branch target destination addresses. Shared bits may result in more efficient memory usage in the processor, for example.