Managing sub-block erase operations in a memory sub-system

A processing device in a memory system connects a first data block of the memory device to a second data block of the memory device to generate a combined data block comprising a first plurality of sub-blocks of the first data block and a second plurality of sub-blocks of the second data block, wher...

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Bibliographische Detailangaben
Hauptverfasser: Yu, Erwin E, Xu, Yunfei, Kavalipurapu, Kalyan Chakravarthy, Chen, Hong-Yan, Iwasaki, Tomoko Ogura
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A processing device in a memory system connects a first data block of the memory device to a second data block of the memory device to generate a combined data block comprising a first plurality of sub-blocks of the first data block and a second plurality of sub-blocks of the second data block, wherein the connecting includes: for each wordline of a first plurality of wordlines of the first data block, creating a wordline connection short between the respective wordline of the first data block and a corresponding wordline of a second plurality of wordlines of the second data block, wherein the first plurality of wordlines and the second plurality of wordlines comprise data wordlines; and driving a first data wordline of the first data block and a second wordline of the second data block using a single string driver of the memory device.