Techniques for reading memory cells in a memory device during a multi-pass programming operation

The memory device that includes a memory block memory cells arranged in word lines. A controller is in electrical communication with the memory cells and is configured to program the memory cells to a first set of data states in a first programming pass and then to a greater second set of data state...

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Bibliographische Detailangaben
Hauptverfasser: Wan, Jun, Wan, Zhenni, Lei, Bo, Xu, Huiwen, Agrawal, Nidhi
Format: Patent
Sprache:eng
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Zusammenfassung:The memory device that includes a memory block memory cells arranged in word lines. A controller is in electrical communication with the memory cells and is configured to program the memory cells to a first set of data states in a first programming pass and then to a greater second set of data states in a second programming pass. During programming of a first set of memory cells in at least one of the first and second programming passes, the controller is further configured to determine programming statuses of a second set of memory cells that is adjacent the first set of memory cells. The controller is further configured to read the first set of memory cells using a read voltage that is adjusted from a base read voltage based on the determined programming statuses of the second set of memory cells.