Manufacturing method for semiconductor silicon wafer

A semiconductor silicon wafer manufacturing method is provided, where P aggregate defects and SF in an epitaxial layer can be suppressed. A silicon wafer substrate cut from a monocrystal ingot is doped with phosphorus and has a resistivity of 1.05 mΩ·cm or less and a concentration of solid-solution...

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Bibliographische Detailangaben
Hauptverfasser: Narimatsu, Shingo, Senda, Takeshi
Format: Patent
Sprache:eng
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Zusammenfassung:A semiconductor silicon wafer manufacturing method is provided, where P aggregate defects and SF in an epitaxial layer can be suppressed. A silicon wafer substrate cut from a monocrystal ingot is doped with phosphorus and has a resistivity of 1.05 mΩ·cm or less and a concentration of solid-solution oxygen of 0.9×1018 atoms/cm3. The method includes steps of mirror-polishing substrates and heat treatment, where after the mirror-polishing step, the substrate is kept at a temperature from 700° C. to 850° for 30 to 120 minutes, then after the temperature rise, kept at a temperature from 1100° C. to 1250° for 30 to 120 minutes, and after cooling, kept at a temperature from 700° C. to 450° C. for less than 10 minutes as an experience time. The heat treatment step is performed in a mixture gas of hydrogen and argon. The method includes an epitaxial layer deposition step to a thickness of 1.3 μm to 10.0 μm.