Fast purge on storage devices
A memory device includes a memory array including memory cells, a communication interface to a host device, and a memory control unit operatively coupled to the memory array and the communication interface. The memory control unit is configured to encrypt write data received via the communication in...
Gespeichert in:
1. Verfasser: | |
---|---|
Format: | Patent |
Sprache: | eng |
Schlagworte: | |
Online-Zugang: | Volltext bestellen |
Tags: |
Tag hinzufügen
Keine Tags, Fügen Sie den ersten Tag hinzu!
|
Zusammenfassung: | A memory device includes a memory array including memory cells, a communication interface to a host device, and a memory control unit operatively coupled to the memory array and the communication interface. The memory control unit is configured to encrypt write data received via the communication interface to produce encrypted data, program a portion of the memory cells of the memory array with the encrypted data, read the encrypted data from the portion of the memory cells in response to a memory read request, decrypt the read encrypted data to produce read decrypted data only for portions of the read encrypted data not stored in purged regions of the memory array. |
---|