Integrated circuit including test circuit and method of manufacturing the same

An integrated circuit includes first to nth metal layers vertically stacked on a substrate, and a test circuit outputting a test result signal according to a characteristic of each of the first to nth metal layers. The test circuit includes first to nth test circuits for generating a plurality of cl...

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Bibliographische Detailangaben
Hauptverfasser:	Oh, Kwanghun, Han, Changho, Lim, Mijeong, Kim, Yuncheol
Format:	Patent
Sprache:	eng
Schlagworte:	BASIC ELECTRIC ELEMENTS ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR ELECTRICITY MEASURING MEASURING ELECTRIC VARIABLES MEASURING MAGNETIC VARIABLES PHYSICS SEMICONDUCTOR DEVICES TESTING
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Beschreibung
Zusammenfassung:	An integrated circuit includes first to nth metal layers vertically stacked on a substrate, and a test circuit outputting a test result signal according to a characteristic of each of the first to nth metal layers. The test circuit includes first to nth test circuits for generating a plurality of clock signals. Each clock signal of the plurality of clock signal has a frequency according to a characteristic of a corresponding metal layer among the first to nth metal layers, and n is a natural number.