Semiconductor structure and method for preparing the same

The present disclosure provides a semiconductor structure and a method for preparing it. After planarization of the Cu layer, by means of wet etch process, Cu residues near an edge of a Cu post can be effectively removed, and a first height difference is configured to be between the Cu post and an insulating layer. Further, an Si substrate is then dry etched, so that a second height difference is configured to be between the Si substrate and the insulating layer, and the second height difference is arranged to be greater than the first height difference. In this way, a connection of Cu inside and outside the insulating layer may be further avoided, thereby effectively avoiding an influence on electrical properties of a device.