Data error correction circuit and data transmission circuit

A data error correction circuit and a data transmission circuit are disclosed. The data error correction circuit includes: a decoding circuit having an input terminal connected to a data bus, and configured to receive first data and a check code of the first data and output an error correction code of the first data based on the check code; and an error correction latch module having a first input terminal connected to the data bus and a second input terminal connected to an output terminal of the decoding circuit, and configured to latch the first data corresponding to the error correction code and generate and output second data according to the error correction code and the corresponding first data.