Semiconductor package and method of fabricating the same

Disclosed are semiconductor packages and/or methods of fabricating the same. The semiconductor package comprises a package substrate, a first semiconductor chip mounted on the package substrate, a second semiconductor chip mounted on a top surface of the first semiconductor chip, and a first under-f...

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Bibliographische Detailangaben
Hauptverfasser: Lee, Jayeon, Yoo, Jaekyung, Lee, Jae-eun, Ko, Yeongkwon, Lee, Teak Hoon, Park, Jin-woo
Format: Patent
Sprache:eng
Schlagworte:
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Zusammenfassung:Disclosed are semiconductor packages and/or methods of fabricating the same. The semiconductor package comprises a package substrate, a first semiconductor chip mounted on the package substrate, a second semiconductor chip mounted on a top surface of the first semiconductor chip, and a first under-fill layer that fills a space between the package substrate and the first semiconductor chip. The package substrate includes a cavity in the package substrate, and a first vent hole that extends from a top surface of the package substrate and is in fluid communication with the cavity. The first under-fill layer extends along the first vent hole to fill the cavity.