Semiconductor packaging substrate fine pitch metal bump and reinforcement structures

Semiconductor packaging substrate fine pitch metal bump and reinforcement structures

Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal conta...

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Bibliographische Detailangaben
Hauptverfasser: Chung, Chih-Ming, Zhai, Jun, Kao, Yifan, Jeon, Young Doo, Kim, Taegui, Hsu, Jun Chung
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRIC ELEMENTS
ELECTRIC SOLID STATE DEVICES NOT OTHERWISE PROVIDED FOR
ELECTRICITY
SEMICONDUCTOR DEVICES
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Beschreibung
Zusammenfassung:Semiconductor packaging substrates and processing sequences are described. In an embodiment, a packaging substrate includes a build-up structure, and a patterned metal contact layer partially embedded within the build-up structure and protruding from the build-up structure. The patterned metal contact layer may include an array of surface mount (SMT) metal bumps in a chip mount area, a metal dam structure or combination thereof.