Strategic power mode transition in a multi-memory device

Methods, systems, and devices for strategic power mode transition in a multi-memory device are described. A controller may receive, from a host device, a command indicating that the controller is to transition a volatile memory and a non-volatile memory from respective deep sleep modes. In a first example, the controller may respond to the command by transitioning the volatile memory to a standby power mode for the volatile memory and transitioning the non-volatile memory to an intermediate power mode for the non-volatile memory that consumes less power than a standby mode for the non-volatile memory. In a second example, the controller may respond to the command by transitioning the volatile memory to the standby power mode for the volatile memory and maintain the non-volatile memory in the deep sleep mode until a condition, such as a miss, occurs.