Fail-safe circuit for a low voltage differential signaling receiver

The present invention relates to differential receivers, and more particularly to a fail-safe circuit for low-voltage differential signaling (LVDS) receivers having single differential input disconnect detection with a latchable control signal interrupt capability. In operation, the receiver output is applied to a Vout output as long as the control signal is in a normal operating state, and on the first occurrence of a fault condition trigger is applied to the input of a latch, the latch latches applying a fault state to the control signal which causes the Vout output to follow the control signal blocking the receiver output until the latch is reset after the fault has been corrected.