Instrumentation networks for data flow graphs

A reconfigurable processor comprises an array of processing units and an instrumentation network. The array of processing units is configured to execute runtime events to execute an application. The instrumentation network is operatively coupled to the array of processing units. The instrumentation...

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Bibliographische Detailangaben
Hauptverfasser: Grimm, Matthew Thomas, Leung, Kin Hing, Prabhakar, Raghu, Gupta, Sitanshu, Boasso, Luca, Jairath, Sumti, Lin, Yuan
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:A reconfigurable processor comprises an array of processing units and an instrumentation network. The array of processing units is configured to execute runtime events to execute an application. The instrumentation network is operatively coupled to the array of processing units. The instrumentation network comprises a control bus configured to form control signal routes in the instrumentation network. The instrumentation network further comprises a plurality of instrumentation counters having inputs and outputs connected to the control bus and to the processing units. Instrumentation counters in the plurality instrumentation units are configurable to consume control signals on the inputs and produce counts of the runtime events on the outputs.