Frame synchronization detection with frequency estimation

A wireless device includes a receiver to receive a packet via one or more antennas. A frame synchronization detection circuit coupled to the receiver identifies a frame synchronization pattern within a portion of the packet. A correlation circuit coupled to the frame synchronization detection circuit computes, in response to the identifying of the frame synchronization pattern within the portion of the packet, a frequency offset using a correlation method. A frequency estimation correction circuit coupled to the correlation circuit determines, based on the frame synchronization pattern, a bias value, wherein the bias value corresponds to a data pattern within the frame synchronization pattern indicative of a frequency bias, and applies a correction to the frequency offset, wherein applying the correction to the frequency offset comprises modifying the frequency offset using the bias value.