Product design for test to enable electrical non-destructive test for measuring multi-chip interconnect defects

A semiconductor stack, including a carrier and a semiconductor device arranged above the carrier; non-releasable interconnections electrically and mechanically connecting the semiconductor device and the carrier; a first contact on at least one of the carrier or the semiconductor device: a second contact on at least one of the carrier or the semiconductor device; an electrical connection structure electrically conductively coupling the first contact and the second contact with each other via at least one non-releasable interconnection of the non-releasable interconnections; and wherein the electrical connection structure comprises a plurality of test diode circuits integrated in at least one of the carrier and the semiconductor device, wherein each of the test diode circuits comprises one or more diodes.