Cell instance charge model for delay calculation

Various embodiments provide a charge model for a cell instance for delay calculation of a circuit design that includes the cell instance, where the charge model can be part of electronic design automation (EDA) and used in timing analysis of a circuit design that includes the cell instance. The char...

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Bibliographische Detailangaben
Hauptverfasser: Keller, Igor, Dong, Xiaopeng, Rajguru, Sourabh
Format: Patent
Sprache:eng
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Beschreibung
Zusammenfassung:Various embodiments provide a charge model for a cell instance for delay calculation of a circuit design that includes the cell instance, where the charge model can be part of electronic design automation (EDA) and used in timing analysis of a circuit design that includes the cell instance. The charge model generated by an embodiment can predict a charge at an input of a cell instance for an arbitrary input voltage waveform and can address (e.g., reduce or negate) a time delay impact the Miller effect has on the cell instance.