3-D DRAM structure with vertical bit-line
Memory devices are described. The memory devices include a plurality of bit lines extending through a stack of alternating memory layers and dielectric layers. Each of the memory layers include a first word line, a second word line, a first capacitor, and a second capacitor. Methods of forming stack...
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| Format: | Patent |
| Sprache: | eng |
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| Zusammenfassung: | Memory devices are described. The memory devices include a plurality of bit lines extending through a stack of alternating memory layers and dielectric layers. Each of the memory layers include a first word line, a second word line, a first capacitor, and a second capacitor. Methods of forming stacked memory devices are also described. |
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