Cascode Class-A differential reference buffer using source followers for a multi-channel interleaved Analog-to-Digital Converter (ADC)

A reference buffer has many legs each with an upper transistor, a lower transistor, and a resistor or current source as a tail device in series. The source or emitter of the upper (lower) transistor generates an upper (lower) reference voltage. This source follower transistor configuration has a low output impedance and high current. The gate or base of the upper (lower) transistors are driven by a first (second) control node. A control leg has an upper transistor, a lower transistor, and a tail device in series. The source and gate, or emitter and base, are connected together for the upper and lower transistors and generate the upper and lower control nodes. Alternately, the gate or base of the upper (lower) transistor is driven by an op amp receiving an upper (lower) bandgap voltage and the upper (lower) control node as negative feedback.