Command address input buffer bias current reduction

A memory device may include one or more memory banks that store data and one or more input buffers. The input buffers may receive command address signals to access the one or more memory banks. The memory device may operate in one of a first mode of operation or a second mode of operation. The one o...

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Bibliographische Detailangaben
1. Verfasser: Howe, Gary L
Format: Patent
Sprache:eng
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