Command address input buffer bias current reduction

A memory device may include one or more memory banks that store data and one or more input buffers. The input buffers may receive command address signals to access the one or more memory banks. The memory device may operate in one of a first mode of operation or a second mode of operation. The one o...

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Bibliographische Detailangaben
1. Verfasser:	Howe, Gary L
Format:	Patent
Sprache:	eng
Schlagworte:	CALCULATING COMPUTING COUNTING EARTH DRILLING EARTH DRILLING, e.g. DEEP DRILLING ELECTRIC DIGITAL DATA PROCESSING FIXED CONSTRUCTIONS GRINDING INFORMATION STORAGE LAYERED PRODUCTS LAYERED PRODUCTS, i.e. PRODUCTS BUILT-UP OF STRATA OF FLAT ORNON-FLAT, e.g. CELLULAR OR HONEYCOMB, FORM MINING OBTAINING OIL, GAS, WATER, SOLUBLE OR MELTABLE MATERIALS OR ASLURRY OF MINERALS FROM WELLS PERFORMING OPERATIONS PHYSICS POLISHING STATIC STORES TOOLS FOR GRINDING, BUFFING, OR SHARPENING TRANSPORTING
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Beschreibung
Zusammenfassung:	A memory device may include one or more memory banks that store data and one or more input buffers. The input buffers may receive command address signals to access the one or more memory banks. The memory device may operate in one of a first mode of operation or a second mode of operation. The one or more input buffers may operate under a first bias current when the memory device is in the first mode of operation or a second bias current when the memory device is in the second mode of operation, and the first bias current may be greater than the second bias current.