Bias current receiver with selective coupling circuit

Bias current receiver with selective coupling circuit

An integrated circuit (IC), including: a current mirror, including: a first field effect transistor (FET) including a first drain, a first gate, and a first source, wherein the first source is coupled to a first voltage rail; and a second FET including a second drain, a second gate, and a second sou...

Ausführliche Beschreibung

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Bibliographische Detailangaben
Hauptverfasser: Chintarlapalli Reddy, Harikrishna, Sinha, Rakesh Kumar, Varghese K, Jibu, Murali, Abhinav, Sana, Pradeep Kumar, Mohamad, Sajin
Format: Patent
Sprache:eng
Schlagworte:
BASIC ELECTRONIC CIRCUITRY
ELECTRIC COMMUNICATION TECHNIQUE
ELECTRICITY
PULSE TECHNIQUE
TRANSMISSION
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Beschreibung
Zusammenfassung:An integrated circuit (IC), including: a current mirror, including: a first field effect transistor (FET) including a first drain, a first gate, and a first source, wherein the first source is coupled to a first voltage rail; and a second FET including a second drain, a second gate, and a second source, wherein the second gate is coupled to the first gate of the first FET, and the second source is coupled to the first voltage rail; and a selective coupling circuit configured to selectively couple the first drain of the first FET to the first and second gates of the first and second FETs based on a voltage at the first drain of the first FET.